Resurrecting the SuperH Architecture (2015)

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Processor architectures are acold from trivial; untold millions of dollars and galore thousands of hours person apt gone into the creation and refinement of the x86 and ARM architectures that predominate the CPUs successful Linux boxes today. But that does not mean that x86 and ARM are the only architectures of value, arsenic Jeff Dionne, Rob Landley, and Shumpei Kawasaki illustrated successful their LinuxCon Japan convention "Turtles each the way down: moving Linux connected unfastened hardware." The squad has been working on breathing caller life into a somewhat older architecture that offers comparable capacity to galore communal system-on-chip (SoC) designs—and which can beryllium produced arsenic unfastened hardware.

The architecture successful mobility is Hitachi's SuperH, whose instruction group was a precursor to 1 utilized successful galore ARM Thumb CPUs. But the patents connected the astir important SuperH designs person all expired—and much will beryllium expiring successful the months and years to come—which makes SuperH a campaigner for revival. Dionne, Landley, and Kawasaki's session [PDF] outlined the position of their SuperH-based "J2" halfway design, which can beryllium synthesized successful low-cost FGPAs aliases manufactured successful bulk.

Dionne started disconnected the talk by making a lawsuit for the worth of running open-source package connected unfastened hardware. That is simply a familiar enough position, of course, but he went connected to constituent retired that a modern laptop contains galore much ARM and MIPS processors than it does x86 processors. These mini processors service arsenic USB and hard-drive controllers, tally ACPI and low-level strategy guidance services, and much more. Thus, the conception of "taking power of your hardware" has to see these chips arsenic well.

He past asked what constitutes the minimal strategy that tin run Linux. All that is really needed, he said, is simply a flat, 32-bit memory address space, a CPU pinch registers to clasp instructions, immoderate I/O and retention (from which the kernel and initramfs tin beryllium loaded), and a timer for interrupts. That positive GCC is capable to get Linux running—although it whitethorn not beryllium fast, depending connected the specifics. One does not moreover request a cache, floating-point unit, SMP, aliases a memory-management portion (MMU).

At this point, Landley chimed successful to constituent retired that Dionne had been the maintainer of uClinux, which was an progressive task maintaining Linux connected non-MMU systems up done 2003, erstwhile Dionne handed off maintainership to others where, unfortunately, improvement slowed down considerably. The requirements for moving Linux are rather low, though; galore of the open-hardware boards celebrated coming (such arsenic the Raspberry Pi) propulsion in all sorts of unnecessary extras.

That brings america to SuperH, which Dionne said was developed pinch a "massive investigation and improvement outlay." The SuperH SH2 was a highly optimized design, employing a five-stage Harvard RISC architecture pinch an instruction-set density considerably up of its contemporaries. That density is simply a communal measurement to measurement CPU efficiency, he explained; a dense architecture requires less instructions and thus less timepiece cycles to execute a fixed task. Most of a CPU's clock cycles are spent waiting for something, he said; waiting for instructions is specified a bottleneck that if you tin get them fast enough, "it almost doesn't matter what your timepiece velocity is."

The SuperH architecture is truthful dense that a 2009 research insubstantial [PDF] plotted it up of each architecture other than x86, x86_64, and CRIS v32. ARM even licensed the SuperH patent portfolio to create its Thumb instruction group successful the mid-1990s.

Fortunately, the patents are now expiring. The past of the SH2 patents expired successful 2014, pinch much to come. The SH2 processor was, he said, utilized successful the Sega Saturn crippled console; the SH4 (found successful the Sony Sega Dreamcast) will person the past of its patents expire successful 2016. Though they are older chips, they were utilized successful comparatively powerful devices.

In mentation for this milestone, Dionne, Landley, and others have been moving connected J2, a clean-room re-implementation of the SH2 that is implemented as a "core creation kit." The root for the halfway is written successful VHDL, and it tin beryllium synthesized connected a Xilinx Spartan6 FPGA. The Spartan6 is a low-cost level (boards tin beryllium purchased for astir $50), but it also contains capable room to adhd further synthesized components—like a serial controller, representation controller, digital signal processor, and Ethernet controller. In different words, a basic SoC.

The different main advantage of the J2 task is that the activity for implementing SuperH support is already done successful the kernel, GCC, GDB, strace, and astir different strategy components. By comparison, location are a few different unfastened CPU halfway projects for illustration OpenRISC and RISC-V, but those developers must constitute each of their codification from scratch—if the CPU core designs ever go unchangeable capable to use. As Landley past added, "we didn't person to constitute caller code; we conscionable had to excavation immoderate of it up and particulate it off."

The task has frankincense "inherited" an fantabulous ISA, and has even been successful interaction pinch galore of the erstwhile Hitachi labor that worked on SuperH. But that is of small consequence if a $50 FPGA is the only hardware target. The Spartan6 is inexpensive arsenic FPGAs go, but still more than astir customers would salary for an SoC. So the J2 build chain not only generates a Xilinx bitstream (the output which is then synthesized onto the FPGA); it besides generates an RTL circuit creation that tin beryllium manufactured by an application-specific integrated circuit (ASIC) fabrication service.

Chip fabrication is not inexpensive if 1 shops astir for the newest and smallest process, Dionne said—but, successful reality, location are many ASIC vendors who are happy to nutrient low-cost chips connected their older instrumentality because the costs of retooling a works is exorbitant. A 180nm implementation of the J2 design, he said, costs astir 3 cents per chip, pinch nary royalties required. "That's disposable computing astatine the 'free artifact inside' level."

As of today, the J2 is capable to build low-end devices, but the roadmap is heading toward much analyzable designs arsenic much SuperH patents expire. In 2016, the adjacent iteration, called J2+, will adhd SMP support and an array of DSPs that will make it usable for signal-processing applications for illustration aesculapian devices and Internet-of-Things (IoT) products for illustration the oft-cited location energy monitor. A twelvemonth aliases truthful further out, the J4 (based connected the SH4 architecture) will adhd azygous instruction, multiple data (SIMD) arrays and will beryllium suitable for set-top boxes and automotive computing.

Landley and Dionne past did a unrecorded demonstration, booting Linux on a J2 halfway that they had synthesized onto an off-the-shelf Spartan6 board purchased the time earlier successful Tokyo's Akihabara district. The demo committee booted a 3.4 kernel—though it took several seconds—and started a bash prompt. A mini victory, but it was capable to warrant a information of applause from the crowd. Dionne noted that they do person support successful the useful for newer kernels, too. Landley said that he was still successful the process of mounting up the two public web sites that will archive the project. The nommu.org site will archive no-MMU Linux development, he said (hopefully replacing the now-defunct uClinux site), while 0pf.org will archive the team's hardware work.

In an effort to trim the hardware costs and bootstrap community interest, the squad is besides readying a Kickstarter run that will produce a improvement board—hopefully pinch a much powerful FPGA than the exemplary recovered connected existing starter kits—in a Raspberry-Pi–compatible shape factor. By including a larger FPGA, these boards should beryllium compatible pinch the J4 SMP design; the Lx9 type of Spartan6 (which was utilized for the J2 development systems) simply does not person capable logic gates for SMP usage.

At the extremity of the talk, an assemblage personnel voiced interest that SuperH was aged capable that support for it is unmaintained successful a batch of projects. He suggested that the J2 team might request to enactment quickly to extremity its removal. Landley noted that, indeed, the latest buildroot merchandise did region SuperH support, "but we're trying to get them to put it backmost now." Luckily, Dionne said, there are different projects keeping wide no-MMU support successful the kernel up-to-date, specified arsenic Blackfin and microblaze. The squad has been working connected getting no-MMU support into musl and getting immoderate of the relevant GCC build devices "cleaned up" from immoderate insignificant spot rot.

Another assemblage personnel asked whether aliases not the SuperH ISA was getting excessively aged to beryllium relevant. In response, Dionne handed the microphone complete to Kawasaki, who had remained disconnected to the broadside for the entire position up to that point. Kawasaki was 1 of the original SH2 architects and is now a personnel of the J2 project. There have been immoderate insignificant additions, he said: the J2 adds 4 new instructions. One for atomic operations, 1 to activity astir the barrel shifter, "which did not activity the measurement the compiler wanted it to," and a mates that are chiefly of liking to assembly programmers. There are ever questions astir architecture changes, he said, but mostly the mobility is whether to make the changes mandatory aliases simply provide them arsenic VHDL overlays. For the astir part, though, the architecture already had everything Linux needs and useful well, contempt its age.

As of today, the nommu.org tract is online and has an progressive mailing list, though the Git repository Landley promised is not yet up and running. The 0pf.org tract is besides up and running, and contains much more successful the measurement of documentation. While the task is still successful its early stages, it seems to beryllium generating sizeable interest, and with respective much iterations of unfastened CPU designs still to come.

[The writer would for illustration to convey the Linux Foundation for recreation assistance to be LCJ 2015.]

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