Demystifying DRAM Read Disturbance: RowHammer and RowPress Phenomena

[Submitted connected 30 Jul 2026]

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Abstract:DRAM publication disturbance, for illustration RowHammer and RowPress, is simply a captious robustness rumor wherever accessing DRAM tin origin unintended bitflips successful different unaccessed DRAM locations. DRAM publication disturbance bitflips importantly effect the safe, secure, and reliable cognition of DRAM-based computing systems. Many anterior useful experimentally qualify these bitflips and propose mitigations based connected empirical results. Other device-level useful study their underlying beingness mechanisms, but these mechanisms do not afloat explicate each awesome empirical observations.
Our extremity is to span the spread betwixt experimental characterization and device-level modeling and knowing of RowHammer and RowPress, providing a opinionated instauration for early activity connected understanding, characterizing, and mitigating DRAM publication disturbance. We first place and show gaps and inconsistencies betwixt the beingness mechanisms of RowHammer and RowPress described by existing device-level models and experimental characterization of their bitflips. We attraction connected 3 basal metrics that should representation to first-order beingness mechanisms: 1) bitflip directions, 2) bitflip counts, and 3) the minimum number of aggressor statement activations that trigger the first bitflips (i.e., ACmin). Second, we coming a broad and rigorous group of TCAD simulations that lucifer phenomena observed successful experimental characterizations of RowHammer and RowPress bitflips.
From our results, we 1) summarize updated device-level correction mechanisms for knowing RowHammer and RowPress bitflips, and 2) place cardinal modeling and simulation parameters that importantly impact whether simulation results lucifer real-chip characterization. We talk implications for 1) rigorous, comprehensive, and businesslike experimental characterization methodologies of DRAM publication disturbance bitflips, and 2) the creation of DRAM publication disturbance mitigation techniques.